The present invention concerns a computing system with an input/output bus (I/O) and more particularly concerns multiple input/output devices sharing processing and memory resources.
In computing systems which function as network servers, it is increasingly common to utilize multiple central processing units (CPUs) interconnected by a host (processor/memory) bus. In such a system a main memory for the system is also connected to the host bus. Communication with I/O devices is generally through an I/O bus connected to the host bus through a bus bridge.
Typically I/O devices are used to connect external input/output systems, for example, networks or mass storage, to the computing system. Each I/O device generally includes a dedicated processor and local memory. The local memory is used to temporarily store data being transferred to or received from the external I/O system. An external I/O system interface generally controls data transfer between the external I/O system and the local memory. The dedicated processor is used to control data transfers between the local memory and the I/O bus.
In order to function properly, the bus bridge needs to implement all the features of both the host bus and the I/O bus. In addition, the bus bridge is required to perform data transfers over the host bus at a sufficient bandwidth to prevent performance degradation.
Some I/O buses require that data transactions be atomic. That is, other transactions need to be "locked out" during atomic data transactions. A bus bridge which interfaces with such an I/O bus needs to be able to implement this feature. However, when an bus bridge performs atomic transactions, this slows down overall system performance.
When there are multiple processors in a system competing with the bus bridge for access to memory over the host bus, this can slow the access of the bus bridge to main memory and thus cause a significant bottleneck in performance in system I/O.